Field effect transistors (FETs) and other transistor types are employed as output devices in many applications, such as amplifiers, power supplies, motor drivers, industrial relays and other applications. These output transistors are usually designed to handle large currents for driving current to respective loads. Associated control circuitry and drive circuitry is employed to switch the output transistors between a conducting “ON” state and a nonconducting “OFF” state. In some applications (e.g., switching amplifiers, switching supplies), the output transistors are switched between a conducting “ON” state and a nonconducting “OFF” state in a continuous manner. This continuous switching can result in certain undesirable effects, such as high inrush currents, voltage spikes, electromagnetic emissions and harmonic distortion. As a result, techniques are employed to mitigate the undesirable effects, sometimes with a tradeoff in performance or reliability. Furthermore, some techniques may mitigate one undesirable effect, while increasing another undesirable effect.
For example, Class D audio amplifiers employ a high-side and low-side power output FET that switch a common node as an output between a high supply rail (e.g., supply voltage) and a low supply rail (e.g., ground) by turning the high-side power output FET and low-side power output FET between opposing “ON” and “OFF” states. The class D audio amplifiers also employ a switching control mechanism and drive circuitry to drive the high-side power output FET and the low-side power output FET “ON” and “OFF”. The switching control mechanism and drive circuitry control the turn “ON” time interval and the turn “OFF” time interval for the high-side and low-side power output FET. The switching control mechanism and drive circuitry control also control the blanking time, which is the amount of time that both power output FETs remain “OFF” before one of the power output FETs is turned “ON”. This assures that both FETs are not turned “ON” concurrently shorting the high supply rail to the low supply rail.
The reliability of the amplifier system increases with the time interval of the blanking time. However, another critical specification associated with amplifier systems and other switching systems is mitigating harmonic distortion, which is a residual effect that increases with an increase in the time interval of the blanking time. The harmonic distortion can be reduced by driving the high-side and low-side output FET faster during transitions reducing harmonic distortion resulting in a reduced blanking time with reduced reliability. Additionally, driving the high-side and low-side output FET faster at high power levels can result in large voltage spikes on the output damaging either or both the high-side and low-side output FET. Therefore, tradeoffs are made between blanking time, reliability, harmonic distortion, transition speed and potential voltage spikes when designing an amplifier system within specifications resulting in a less than optimal amplifier system.